Lab 8: Servicing the ADC with DMA
8 - 16 TMS320F2837xD Microcontroller Workshop - Direct Memory Access
F2837xD_GlobalVariableDefs.c
F2837xD_Headers_nonBIOS_cpu1.cmd
Inspect Lab_8.cmd
2. Open and inspect Lab_8.cmd. Notice that a section called “dmaMemBufs” is being
linked to RAMGS4. This section links the destination buffer for the DMA transfer to a DMA
accessible memory space. Close the inspected file.
Setup DMA Initialization
The DMA controller needs to be configured to buffer ADC channel A0 ping-pong style with 50
samples per buffer. One conversion will be performed per trigger with the ADC operating in
single sample mode.
3. Edit Dma.c to implement the DMA operation as described in the objective for this lab
exercise. Configure the DMA Channel 1 Mode Register (MODE) so that the peripheral
interrupt source select is set to channel 1. Enable the peripheral interrupt trigger and set
the channel for interrupt generation at the start of transfer. Configure for 16-bit data
transfers with one burst per trigger and auto re-initialization at the end of the transfer.
Enable the channel interrupt. Configure the DMA Trigger Selection Register
(DMACHSRCSELx) so that the ADCAINT1 is the peripheral interrupt trigger source. In
the DMA Channel 1 Control Register (CONTROL) clear the error and peripheral interrupt
bits. Enable the channel to run.
4. Open Main_8.c and add a line of code in main() to call the InitDma() function.
There are no passed parameters or return values. You just type
InitDma();
at the desired spot in main().
Setup PIE Interrupt for DMA
Recall that ePWM2 is triggering the ADC at a 50 kHz rate. In the previous lab exercise, the ADC
generated an interrupt to the CPU, and the CPU read the ADC result register in the ADC ISR.
For this lab exercise, the ADC is instead triggering the DMA, and the DMA will generate an
interrupt to the CPU. The CPU will read the ADC result register in the DMA ISR.
5. Edit Adc.c to comment out the code used to enable the ADCA1 interrupt in PIE group 1.
This is no longer being used. The DMA interrupt will be used instead.
6. Using the “PIE Interrupt Assignment Table” find the location for the DMA Channel 1
interrupt “DMA_CH1” and fill in the following information:
PIE group #: # within group:
This information will be used in the next step.