EasyManua.ls Logo

Chroma A620028 - Function Description; I;P (PFC) Stage

Default Icon
238 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Theory of Operation
6-3
Figure 6-4 shows the digital stage structure.
Figure 6-4
6.2 Function Description
6.2.1 I/P (PFC) Stage
1. The input stage is a bridge rectifier that rectifies the 3-phase AC power source to DC.
2. The input stage inhibits inrush current by connecting the input circuit through a 40
resistor in series during power-on to charge the input capacitor. It then turns on an SCR
after a few seconds and bypasses this current limit resistor.
FPGA
DSP Memory
Linear
Regulator
+1.26VD
+3.3VD
+5VD
DGND
Isolated APG
Keyboard
K Board U Board
RS232/RS485
USB,System BUS
G Board
GPIB
Ethernet
Z Board
Fan signal
A Board
AC_Fault signal
C Board
F Board
Driver signal
SCR driver signal
+1.2VD
D Board

Table of Contents

Related product manuals