Dell PowerEdge XR8620t

Table 40. Memory Settings details(continued)
Option Description
Memory Map Out This option controls DIMM slots on the system. This option is set to
Enabled by default. It allows to disable system installed DIMMs.
Processor Settings
To view the Processor Settings screen, power on the system, press F2, and click System Setup Main Menu > System
BIOS > Processor Settings.
Table 41. Processor Settings details
Option Description
Logical Processor Each processor core supports up to two logical processors.
If this option is set to Enabled, the BIOS reports all the
logical processors. If this option is set to Disabled, the BIOS
reports only one logical processor per core. This option is set
to
Enabled by default.
Virtualization Technology
Enables or disables the virtualization technology for the
processor. This option is set to
Enabled by default.
Kernel DMA Protection This option is set to Disabled by default. When option is set
to Enabled, BIOS and Operating System will enable direct
memory access protection for DMA capable peripheral devices
using virtualization technology.
Directory Mode Enables or disables the directory mode. This option is set to
Enabled by default.
Adjacent Cache Line Prefetch Optimizes the system for applications that need high
utilization of sequential memory access. This option is set
to Enabled by default. You can disable this option for
applications that need high utilization of random memory
access.
Hardware Prefetcher Enables or disables the hardware prefetcher. This option is set
to Enabled by default.
DCU Streamer Prefetcher Enables or disables the Data Cache Unit (DCU) streamer
prefetcher. This option is set to Enabled by default.
DCU IP Prefetcher Enables or disables the Data Cache Unit (DCU) IP prefetcher.
This option is set to Enabled by default.
Sub NUMA Cluster Enables or disables the Sub NUMA Cluster. This option is set
to Disabled by default.
MADT Core Enumeration Determines how BIOS enumerates processor cores in the
ACPI MADT table. When set to Round Robin, processor
cores are enumerated in round robin order to evenly distribute
interrupt controllers for the OS across all Sockets and Dies.
When set to
Linear, processor cores are enumerated across
all Dies within a socket before enumerating additional sockets
for a linear distribution.
UMA Based Clustering Status It is a read-only field and displays as Quadrant , when Sub
NUMA Cluster is set to 2Way or 4Way then it displays as
Disable.
UPI Prefetch Enables you to get the memory read started early on DDR
bus. The Ultra Path Interconnect (UPI) Rx path spawns the
Pre-operating system management applications 39