3.31.9.1 Timers and Tripping Logic
64Z1105B
C
t
CBF_1:
Not ready
[ 040 025 ]
CBF_1:
Startup 3p
[ 038 211 ]
CBF_1:
Trip signal t1
[ 038 215 ]
CBF_1:
Trip signal t2
[ 038 219 ]
CBF_1:
CB faulty EXT
[ 038 234 ]
CBF_1:
t1 3p
[ 022 165 ]
C
CBF_1:
t2
[ 022 166 ]
MAIN:
CB failure
[ 036 017 ]
&
0
t 0
Fig. 3-164: Timer stages of the circuit breaker failure protection.
Associated timer stages are started when a startup criterion is met.
●
The signal CBF_1: Trip signal t1 will be issued if the startup criterion is
still present when the time delay, set at timer stage CBF_1: t1 3p, has
elapsed. The output command from this timer stage is intended for a
second CB trip coil.
●
The signal CBF_1: Trip signal t2 will be issued if the startup criterion is
still present when the time delay, set at timer stage CBF_1: t2, has
elapsed. The output command from this timer stage is intended for a
backup circuit breaker or protection system.
These trip signals will be issued as long as the startup criteria are met.
Should a loss of gas pressure occur in the de-arcing chambers of installed type
SF6 circuit breakers then all surrounding circuit breakers must be immediately
tripped without waiting for a reaction from the damaged switch. In case of an
external CB_1 fault the elapsing of timer stage t2 may be interrupted by a signal
to the binary signal input appropriately configured at CBF_1: CB faulty EXT.
3.31.10 Trip Commands
While trip signals issued by the CB failure protection have no timer stages
available the user can set minimum time delays for trip commands.
By appropriate setting it can further be determined that trip commands, issued
by the CB failure protection, will operate in latching mode. The respective trip
command, set to latch mode, will remain active until reset by operating
parameters or through an appropriately configured binary signal input.
P634
3 Operation
3-210 P634/EN M/R-42-A // P634‑311‑653
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