PCWS 2015 Setup Guide - 2nd Edition 3-25
What’s Inside?
System Board Technical Description
• MPEG2 Hardware Acceleration.
• WMV9/VC1 Hardware Acceleration.
• AVC Hardware Acceleration.
•ProcAmp
• Advanced Pixel Adapter De-interlacing.
• Sharpness Enhancement.
• De-noise Filter.
• High Quality Scaling.
• Intel TV Wizard.
• Dedicated analog (VGA) and digital display ports (LVDS) are supported
through the PCH.
Intel Flexible Display Interface (FDI)
The FDI transports video from the graphics controller in the processor to the
legacy display connectors attached to the QM57 PCH.
The FDI utilizes differential signalling to transport data from a pixel source
(the processor graphics controller) to a sink (the PCH). The FDI is composed
of two pipelines, Pipe A and Pipe B. Each pipeline consists of the following.
• Four Tx differential-pairs comprising the data link that transports pixel and
framing data from the display engine.
• One single-ended FDI_INT, which is used for interrupts from the PCH to
the processor.
Each FDI pipeline can be configured according to the bandwidth requirements.
1, 2, 3, or 4 lanes may be used to transport frame data over the link. Each Lane
transports at a rate of 2.7 Gbps and uses ANSI 8b10b encoding.
QM57 General Features
The QM57 PCH on the PCWS 2015 system board is part of a larger family of
Intel 5 Series Chipsets encompassing home, office and mobile applications.
The QM57 is targeted for low power mobile applications and provides all IO
support to the workstation platform as described in the following pages.
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