3-26 PCWS 2015 Setup Guide - 2nd Edition
What’s Inside?
System Board Technical Description
USB 2.0 Ports
The QM57 contains two Enhanced Host Controller Interface (EHCI) host
controllers supporting fourteen USB 2.0 high speed root ports (each with
per-port disable capability). The QM57 contains rate matching logic that
determines whether a USB port is managed by the UHCI controller or
EHCI controller.
IO Panel
Four USB 2.0 connectors are located on the IO Panel and designated
USB1 through USB4 using a standard Type A receptacle. Two unique
powered USB ports, USB5 and USB6 are available at the IO Panel.
The six USB Ports available at the IO Panel can be disabled through the
BIOS.
On Revision C System Boards USB Port enable/disable functions are
performed at the PCH level register, through the O1201r or O1301
BIOS.
Revision D or later System Boards add high-speed USB port switches
controlled by GPIO lines to enable/disable the IO Panel USB Ports,
similar to the Workstation 5A. The USB Port switches allow the IO
Panel USB Ports to be managed from the PCWS Diagnostics Utility,
and take effect without having to restart the workstation.
System Board
The remaining USB ports are reserved for various IO devices within
the workstation. This includes a number of 2x5 USB headers available
for internal options such as a WiFi Card or finger print reader.
USB Port 7 is routed through a miniature DPDT slide switch that
connects it to either the on-board ELO COACH Resistive Touch
Controller or off-board Capacitive Touchscreen Interface board
through J2.
PCI Express
Complies with PCI Express Base Specification, Revision 2.0.
SPI (Serial Peripheral Interface)
The PCH contains two SPI Interfaces.
o The SPI0 channel is dedicated to the Management Engine firmware
stored in U54.
o The SPI1 channel is dedicated to the System BIOS chip, U55.
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