Development Capabilities and Interface
MOTOROLA MPC823e REFERENCE MANUAL 20-35
DEVELOPMENT
20
CAPABILITIES & INTERFACE
Figure 20-11. Enabling Clock Mode Following Reset Timing Diagram
DSDI
CLKOUT
SRESET
DSDI NEGATES FOLLOWING SRESET NEGATION TO ENABLE CLOCKED MODE.
CLKEN
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIRST START BIT DETECTED AFTER DSDI NEGATION (SELF-CLOCKED MODE).
THE INTERNAL CLOCK ENABLE SIGNAL ASSERTS 8 CLOCKS AFTER SRESET NEGATION IF
DSDI IS NEGATED. THIS ENABLES CLOCKED MODE.
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