Motorola MPC823e - Page 1122

MOTOROLA MPC823e REFERENCE MANUAL 21-1
IEEE 1149.1 TEST
21
ACCESS PORT
SECTION 21
IEEE 1149.1 TEST ACCESS PORT
The MPC823e provides a dedicated user-accessible test access port (TAP) that is fully
compatible with the IEEE 1149.1 Standard Test Access Port and Boundary Scan
Architecture . Problems associated with testing high-density circuit boards have led tothe
development of this proposed standard under the sponsorship of the Test Technology
Committee of IEEE and the Joint Test Action Group (JTAG). The MPC823e implementation
supports circuit board test strategies based on this standard.
The TAP consists of five dedicated signal pins, a 16-state TAP controller, and two test data
registers. A boundary scan register links all the device signal pins into a single shift register.
The test logic, which is implemented using static logic design, is independent of the device
system logic. The MPC823e implementation provides the capability to:
• Perform boundary scan operations to check circuit board electrical continuity.
• Bypass the MPC823e for a given circuit board test by effectively reducing the boundary
scan register to a single cell.
• Sample the MPC823e system pins during operation and transparently shift out the
result in the boundary scan register.
• Disable the output drive to pins during circuit board testing.
Note: Certain precautions must be observed to ensure that the IEEE 1149.1-like test
logic does not interfere with nontest operation.