Motorola MPC823e - Page 12

TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
x MPC823e REFERENCE MANUAL MOTOROLA
13.4.5 Transfer Alignment and Packaging ........................................13-25
13.4.6 Arbitration Phase-Related Signals .........................................13-27
13.4.6.1 Bus Request Signal ....................................................13-28
13.4.6.2 Bus Grant Signal ........................................................13-29
13.4.6.3 Bus Busy Signal .........................................................13-29
13.4.7 Address Transfer Phase-Related Signals ..............................13-31
13.4.7.1 Transfer Start Signal ...................................................13-31
13.4.7.2 Address Bus ...............................................................13-32
13.4.7.3 Transfer Attributes ......................................................13-32
13.4.7.3.1 Read/Write Signal ..........................................13-32
13.4.7.3.2 Burst Signal ....................................................13-32
13.4.7.3.3 Transfer Size Signal .......................................13-33
13.4.7.3.4 Address Space Attributes ..............................13-33
13.4.7.3.5 Special Transfer Start Signal .........................13-33
13.4.7.3.6 Burst Data in Progress Signal ........................13-36
13.4.8 Data Transfer Phase-Related Signals ....................................13-36
13.4.8.1 Data Signal .................................................................13-36
13.4.9 Termination Phase-Related Signals .......................................13-36
13.4.9.1 Transfer Acknowledge Signal .....................................13-36
13.4.9.2 Burst Inhibit Signal ......................................................13-36
13.4.9.3 Transfer Error Acknowledge Signal ............................13-36
13.4.9.4 Protocol for Termination Signals ................................13-37
13.4.10 Storage Reservation Protocol ................................................13-38
13.4.11 Exception Control Cycles .......................................................13-41
13.4.11.1 RETRY Signal ............................................................13-42
Section 14
Endian Modes
14.1 Little-Endian Features .........................................................................14-3
14.2 Big-Endian System Features ..............................................................14-5
14.3 PowerPC Little-Endian System Features ............................................14-5
14.4 Setting the Endian Mode Of Operation .............................................. 14-5
Section 15
Memory Controller
15.1 Features ..............................................................................................15-1
15.2 Architecture .........................................................................................15-4
15.3 Register Model ....................................................................................15-7
15.3.1 Register Descriptions ...............................................................15-9
15.3.1.1 Base Registers .............................................................15-9