Motorola MPC823e - Page 404

Memory Controller
15-46 MPC823e REFERENCE MANUAL MOTOROLA
MEMORY CONTROLLER
15
The clock phases shown in these figures refer to the timing windows when the signals
controlled by these bits in the RAM word are driven.
Figure 15-25. UPM Signals Timing Example One
(Division Factor = 1, EBDF = 00)
CLKOUT
GCLK1
GCLK2
CSx
GPL1
GPL2
CST4 CST1 CST2 CST3 CST4 CST1 CST2 CST3
G1T4 G1T3 G1T4 G1T3
G2T4 G2T3 G2T4 G2T3
RAM WORD 1 RAM WORD 2
SYSTEM CLOCK
1234123
CLOCK PHASE