Memory Controller
15-58 MPC823e REFERENCE MANUAL MOTOROLA
MEMORY CONTROLLER
15
15.5.4.2.4 General-Purpose Signals. The general-purpose (GPL[1:5]) signals have two
bits in the RAM word that define the logical value of the signal to be changed at the falling
edge of GCLK1 or GCLK2. GPL0
has two 2-bit fields that perform the same function with
additional phase control. GPL5
and GPL0 offer the following enhancements beyond the
other GPL
x signals:
• GPL5
can be controlled during phase 4 of the previous clock cycle according to the
value of G5LS.
• GPL0
can be controlled by an address line that is specified in the G0CLx field of the
MxMR. To use this feature, you must set the G0H and G0L fields in the RAM word. For
example, if you have a SIMM with multiple banks, this address line can be used to
switch between banks.
Figure 15-30. Early GPL5
Control
CLKOUT/GCLK2
GCLK1
TS
RAM WORD 1 RAM WORD 2
GPL5
VALUE CONTROLLED
BY G5LS
VALUE CONTROLLED
BY G5T4 AND G5T3 ON UPM
412341
CLOCK PHASE
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