Motorola MPC823e - Page 634

Communication Processor Module
16-180 MPC823e REFERENCE MANUAL MOTOROLA
SCCs
COMMUNICATION
16
PROCESSOR MODULE
I—Interrupt
0 = No interrupt is generated after this buffer is serviced.
1 = The specific RX or TX bit in the protocol event register is set when this buffer is
serviced by the communication processor module. These bits can cause an
interrupt when enabled by the mask register.
For frame-oriented protocols, a message can reside in as many buffers as necessary. Each
buffer has a maximum length of (64K–1) bytes. The communication processor module does
not assume that all buffers of a single frame are currently linked to the buffer descriptor
table. It does assume, however, that the unlinked buffers are provided by the core in time to
be transmitted or received. When this does not occur, an error condition is reported by the
communication processor module. An underrun error is reported when data is transmitted
and a busy error is reported when data is received.
Figure 16-65. SCCx Memory Structure
FRAME STATUS
DATA LENGTH
DATA POINTER
SCCx TX BD
TABLE
DUAL- PORT RAM
EXTERNAL MEMORY
TX BUFFER DESCRIPTORS
RX BUFFER DESCRIPTORS
TX DATA BUFFER
FRAME STATUS
DATA LENGTH
DATA POINTER
RX DATA BUFFER
SCCx RX BD
TABLE POINTER
SCCx TX BD
TABLE POINTER
SCCx RX BD
TABLE