Motorola MPC823e - Page 808

Communication Processor Module
16-354 MPC823e REFERENCE MANUAL MOTOROLA
USB
COMMUNICATION
16
PROCESSOR MODULE
The USB controller accepts a reference clock that is four times the USB bit rate. This clock
is programmed in the R1CS field of the serial interface clock register (SICR) and used by
the DPLL circuitry to recover the bit rate clock. Refer to Section 16.7.5.3 Serial Interface
Clock Route Register for more information.
A system clock frequency of at least 40MHz is necessary for operating the USB controller
in high-speed mode using an externally supplied 48MHz reference clock. Alternatively, a
system clock frequency of an exact integral multiple of 48MHz is necessary for operating
the USB controller in high-speed mode using an internal BRG to supply the 48MHz
reference clock.
Table 16-31. USB Pin Functionality
PIN SYMBOL I/O FUNCTION
USBTXN, USBTXP O Outputs from the USB transmitter, inputs to the
differential driver.
USBOE O Output Enable. Active low, enables the
transceiver to transmit data on the bus.
USBRXD I Receive Data. Input the USB receiver from the
differential line receiver.
UBRXP, USBRXN I Gated version of D+ and D-. Used to detect
single-ended zero, and interconnect speed.
Note: The MPC823e can run at different frequencies, but the USB reference clock
must be four times the USB bit rate. The reference clock must be 48MHz for a
12Mb full-speed transfer or 6MHz for a 1.5Mb low-speed transfer.
TP TN RESULT
0 0 single ended “0”
0 1 logic “0”
1 0 logic “1”
1 1 n/a
RP RN RESULT
0 0 single ended “0”
1 0 full speed
0 1 low speed
1 1 n/a