Motorola MPC823e - Page 953

Communication Processor Module
16-499 MPC823e REFERENCE MANUAL MOTOROLA
CPIC
COMMUNICATION
16
PROCESSOR MODULE
Figure 16-135. MPC823e Interrupt Structure
LEVEL 2
LEVEL 7
LEVEL 6
LEVEL5
LEVEL 4
LEVEL 3
LEVEL 1
LEVEL 0
NMI
IREQ[0:7]
IREQ
NMI
GEN
POWERPC
CORE
SYSTEM INTERFACE UNIT
CPM
PORT C[4:15]
TIMER1
TIMER2
SCC2
SMC1
SPI
I
2
C
SMC2
TB
PIT
RTC
PCMCIA
LCD
SWT
IRQ0
INTERRUPT CONTROLLER
INTERRUPT CONTROLLER
DEC
DEC
DEBUG
DEBUG
IDMA1
IDMA2
SDMA
RISC TIMERS
EDGE/
LEVEL
USB
SCC3
TIMER3
TIMER4