Philips LPC2101 - Page 136

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 136
Philips Semiconductors
UM10161
Volume 1
Chapter 11: I
2
C interfaces
Fig 32. Format and states in the Master Transmitter mode
DATA
A
R
WSLAS
DATAAW
SLA
To Master
receive
mode,
entry
= MR
MT
To corresponding
states in Slave mode
A OR AA OR A
A
Other Master
continues
Other Master
continues
A
Other Master
continues
20H
08H
18H 28H
30H
10H
68H 78H B0H
38H 38H
Arbitration lost
in Slave
Address or
Data byte
Not
Acknowledge
received after a
Data byte
Not
Acknowledge
received after
the Slave
Address
Next transfer
started with a
Repeated Start
condition
Arbitration lost
and
addressed as
Slave
Successful
transmission
to a Slave
Receiver
From Master to Slave
From Slave to Master
Any number of data bytes and their associated Acknowledge bits
n
This number (contained in I2STA) corresponds to a defined state of the
I
2
C bus
A P
P
S P