Philips LPC2101 - Applications; Device Information; Architectural Overview

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 4
Philips Semiconductors
UM10161
Volume 1 Chapter 1: Introductory information
• 70 MHz maximum CPU clock available from programmable on-chip PLL with a
possible input frequency of 10 MHz to 25 MHz and a settling time of 100 µs.
• On-chip integrated oscillator operates with an external crystal in the range from
1 MHz to 25 MHz.
• Power saving modes include Idle mode, Power-down mode, and Power-down mode
with RTC active.
• Individual enable/disable of peripheral functions as well as peripheral clock scaling for
additional power optimization.
• Processor wake-up from Power-down mode via external interrupt or RTC.
1.3 Applications
• Industrial control
• Medical systems
• Access control
• Point-of-sale
• Communication gateway
• Embedded soft modem
• General purpose applications
1.4 Device information
1.5 Architectural overview
The LPC2101/02/03 consist of an ARM7TDMI-S CPU with emulation support, the ARM7
Local Bus for interface to on-chip memory controllers, the AMBA Advanced
High-performance Bus (AHB) for interface to the interrupt controller, and the ARM
Peripheral Bus (APB, a compatible superset of ARM’s AMBA Advanced Peripheral Bus)
for connection to on-chip peripheral functions. The LPC2101/02/03 configures the
ARM7TDMI-S processor in little-endian byte order.
AHB peripherals are allocated a 2 megabyte range of addresses at the very top of the
4 gigabyte ARM memory space. Each AHB peripheral is allocated a 16 kB address space
within the AHB address space. LPC2101/02/03 peripheral functions (other than the
interrupt controller) are connected to the APB bus. The AHB to APB bridge interfaces the
APB bus to the AHB bus. APB peripherals are also allocated a 2 megabyte range of
addresses, beginning at the 3.5 gigabyte address point. Each APB peripheral is allocated
a 16 kB address space within the APB address space.
Table 1: LPC2101/02/03 device information
Device Number
of pins
On-chip
SRAM
On-chip
FLASH
ADC
channels
Note
LPC2101 48 2 kB 8 kB 8 inputs -
LPC2102 48 4 kB 16 kB 8 inputs -
LPC2103 48 8 kB 32 kB 8 inputs UART1 with full modem
interface