© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 71
8.1 Features
• Every physical GPIO port is accessible via either the group of registers providing an
enhanced features and accelerated port access or the legacy group of registers.
• Accelerated GPIO functions:
– GPIO registers are relocated to the ARM local bus to achieve the fastest possible
I/O timing.
– Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
– All registers are byte and half-word addressable.
– Entire port value can be written in one instruction.
• Bit-level set and clear registers allow a single instruction set or clear of any number of
bits in one port.
• Individual bits can be direction controlled.
• All I/O default to inputs after reset.
• Backward compatibility with other earlier devices is maintained with legacy registers
appearing at the original addresses on the APB bus.
8.2 Applications
• General purpose I/O
• Driving LEDs or other indicators
• Controlling off-chip devices
• Sensing digital inputs
8.3 Pin description
8.4 Register description
LPC2101/02/03 has one 32-bit General Purpose I/O port. A total of 32 input/output pins
are available on PORT0. PORT0 is controlled by the registers shown in Table 6 4
and
Tabl e 6 5
.
Legacy registers shown in Ta bl e 6 4
allow backward compatibility with earlier family
devices, using existing code. The functions and relative timing of older GPIO
implementations is preserved.
UM10161
Chapter 8: General Purpose Input/Output ports (GPIO)
Rev. 01 — 12 January 2006 User manual
Table 63: GPIO pin description
Pin Type Description
P0.0-P0.31 Input/
Output
General purpose input/output. The number of GPIOs actually available depends on the
use of alternate functions.