© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 221
Philips Semiconductors
UM10161
Volume 1 Chapter 17: RTC
The reference clock divider consists of a 13-bit integer counter and a 15-bit fractional
counter. The reasons for these counter sizes are as follows:
1. For frequencies that are expected to be supported by the LPC2101/02/03, a 13-bit
integer counter is required. This can be calculated as 160 MHz divided by
32,768 minus 1 = 4881 with a remainder of 26,624. Thirteen bits are needed to hold
the value 4881, but actually supports frequencies up to 268.4 MHz (32,768 × 8192).
2. The remainder value could be as large as 32,767, which requires 15 bits.
17.6.1 Prescaler Integer register (PREINT - 0xE002 4080)
This is the integer portion of the prescale value, calculated as:
PREINT = int (PCLK / 32768) − 1. The value of PREINT must be greater than or equal to
1.
17.6.2 Prescaler Fraction register (PREFRAC - 0xE002 4084)
This is the fractional portion of the prescale value, and may be calculated as:
PREFRAC = PCLK − ((PREINT + 1) × 32768).
17.6.3 Example of prescaler usage
In a simplistic case, the PCLK frequency is 65.537 kHz. So:
PREINT = int (PCLK / 32768) − 1 = 1 and
PREFRAC = PCLK - ([PREINT + 1] × 32768) = 1
With this prescaler setting, exactly 32,768 clocks per second will be provided to the RTC
by counting 2 PCLKs 32,767 times, and 3 PCLKs once.
In a more realistic case, the PCLK frequency is 10 MHz. Then,
Table 197: Reference clock divider registers
Name Size Description Access Address
PREINT 13 Prescale Value, integer portion R/W 0xE002 4080
PREFRAC 15 Prescale Value, fractional portion R/W 0xE002 4084
Table 198: Prescaler Integer register (PREINT - address 0xE002 4080) bit description
Bit Symbol Description Reset
value
12:0 Prescaler Integer Contains the integer portion of the RTC prescaler value. 0
15:13 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA
Table 199: Prescaler Integer register (PREFRAC - address 0xE002 4084) bit description
Bit Symbol Description Reset
value
14:0 Prescaler Fraction Contains the integer portion of the RTC prescaler value. 0
15 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA