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Philips LPC2101 - Applications; Chapter 15: Timer;Counter Timer0 and Timer1; Description; Features

Philips LPC2101
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© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 187
Timer/Counter0 and Timer/Counter1 are functionally identical except for the peripheral
base address.
15.1 Features
32-bit Timer/Counter with a programmable 32-bit Prescaler
Counter or Timer operation
Up to four (Timer1) and three (Timer0) 32-bit capture channels that can take a
snapshot of the timer value when an input signal transitions. A capture event may also
optionally generate an interrupt.
Four 32-bit match registers that allow:
Continuous operation with optional interrupt generation on match.
Stop timer on match with optional interrupt generation.
Reset timer on match with optional interrupt generation.
Up to four (Timer1) and three (Timer0) external outputs corresponding to match
registers with the following capabilities:
Set LOW on match.
Set HIGH on match.
Toggle on match.
Do nothing on match.
For each timer, up to four match registers can be configured as PWM allowing to use
up to three match outputs as single edge controlled PWM ouputs.
15.2 Applications
Interval Timer for counting internal events
Pulse Width Demodulator via Capture inputs
Free running timer
Pulse Width Modulator via Match outputs
15.3 Description
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally-supplied clock, and it can optionally generate interrupts or perform other actions
at specified timer values, based on four match registers. It also includes four capture
inputs to trap the timer value when an input signal transitions, optionally generating an
interrupt.
Due to the limited number of pins on the LPC2101/02/03, only three of the Capture Inputs
and three of the Match Ouputs of Timer 0 are connected to device pins.
UM10161
Chapter 15: Timer/Counter Timer0 and Timer1
Rev. 01 — 12 January 2006 User manual

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