© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 16
Philips Semiconductors
UM10161
Volume 1 Chapter 3: System control block
3.3 Register description
All registers, regardless of size, are on word address boundaries. Details of the registers
appear in the description of each function.
[1] Reset value reflects the data stored in used bits only. It does not include reserved bits content.
3.4 Crystal oscillator
The LPC2101/02/03 onboard oscillator circuit supports external crystals in the range of
1 MHz to 25 MHz only. If the on-chip PLL system or the boot-loader is used, the input
clock frequency is limited to an exclusive range of 10 MHz to 25 MHz.
The oscillator output frequency is called F
OSC
and the ARM processor clock frequency is
referred to as CCLK for purposes of rate equations, etc. elsewhere in this document. F
OSC
and CCLK are the same value unless the PLL is running and connected. Refer to the
Section 3.8 “
Phase Locked Loop (PLL)” on page 24 for details and frequency limitations.
The onboard oscillator in the LPC2101/02/03 can operate in one of two modes: slave
mode and oscillation mode.
Table 6: Summary of system control registers
Name Description Access Reset
value
[1]
Address
External Interrupts
EXTINT External Interrupt Flag Register R/W 0 0xE01F C140
INTWAKE Interrupt Wake-up Register R/W 0 0xE01F C144
EXTMODE External Interrupt Mode Register R/W 0 0xE01F C148
EXTPOLAR External Interrupt Polarity Register R/W 0 0xE01F C14C
Memory Mapping Control
MEMMAP Memory Mapping Control R/W 0 0xE01F C040
Phase Locked Loop
PLLCON PLL Control Register R/W 0 0xE01F C080
PLLCFG PLL Configuration Register R/W 0 0xE01F C084
PLLSTAT PLL Status Register RO 0 0xE01F C088
PLLFEED PLL Feed Register WO NA 0xE01F C08C
Power Control
PCON Power Control Register R/W 0 0xE01F C0C0
PCONP Power Control for Peripherals R/W 0x03BE 0xE01F C0C4
APB Divider
APBDIV APB Divider Control R/W 0 0xE01F C100
Reset
RSIR Reset Source Identification Register R/W 0 0xE01F C180
Code Security/Debugging
CSPR Code Security Protection Register RO 0 0xE01F C184
Syscon Miscellaneous Registers
SCS System Controls and Status R/W 0 0xE01F C1A0
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