Philips LPC2101 - Page 80

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 80
Philips Semiconductors
UM10161
Volume 1 Chapter 8: GPIO
maximum output frequency of the digital pin is increased 3.5 times, too. This tremendous
increase of the output frequency is not always that visible when a plain C code is used. To
gain full benefit from the fast GPIO features, write the portion of the application handling
the fast port output in assembly code and execute in the ARM mode.
Here is a code where the pin control section is written in assembly language for ARM.
First, port 0 is configured as slow port, and the program generates two pulses on P0.20.
Then port 0 is configured as fast port, and two pulses are generated on P0.16. This
illustrates the difference between the fast and slow GPIO port output capabilities. Once
this code is compiled in the ARM mode, its execution from the on-chip Flash will yield the
best results when the MAM module is configured as described in Section 4.9 “
MAM usage
notes” on page 43. Execution from the on-chip SRAM is independent from the MAM
setup.
/*set port 0 to slow GPIO */
ldr r0,=0xe01fc1a0 /*register address--SCS register*/
mov r1,#0x0 /*set bit 0 to 0*/
str r1,[r0] /*enable slow port*/
ldr r1,=0xffffffff /* */
ldr r0,=0xe0028008 /*register address--IODIR*/
str r1,[r0] /*set port 0 to output*/
ldr r2,=0x00100000 /*select P0.20*/
ldr r0,=0xe0028004 /*register address--IOSET*/
ldr r1,=0xe002800C /*register address--IOCLR*/
/*generate 2 pulses using slow GPIO on P0.20*/
str r2,[r0] /*HIGH*/
str r2,[r1] /*LOW*/
str r2,[r0] /*HIGH*/
str r2,[r1] /*LOW*/
/*set port 0 to fast GPIO */
ldr r0,=0xe01fc1a0 /*register address--enable fast port*/
mov r1,#0x1
str r1,[r0] /*enable fast port0*/
ldr r1,=0xffffffff
ldr r0,=0x3fffc000 /*direction of fast port0*/
str r1,[r0]
ldr r0,=0x3fffc018 /*FIO0SET -- fast port0 register*/
ldr r1,=0x3fffc01c /*FIO0CLR0 -- fast port0 register*/
ldr r2,=0x00010000 /*select fast port 0.16 for toggle*/
/*generate 2 pulses on the fast port*/
str r2,[r0]
str r2,[r1]
str r2,[r0]
str r2,[r1]
loop: b loop
Figure 16 illustrates the code from above executed from the LPC2101/02/03 Flash
memory. The PLL generated F
CCLK
=60 MHz out of external F
OSC
= 12 MHz. The MAM
was fully enabled with MEMCR = 2 and MEMTIM = 3, and APBDIV = 1 (PCLK = CCLK).