Remote Operation
Instrument Status Reporting - SCPI Elements 5
5-17
bits in the Standard defined Event Status Byte, those events which when true will set the
ESB bit true in the Status Byte. It contains a user-modifiable image of the standard Event
Status Byte, whereby each true bit acts to enable its corresponding bit in the standard Event
Status Byte.
The program command: *ESE phs Nrf performs the selection, where Nrf is a decimal
numeric, which when decoded into binary, produces the required bit pattern in the enabling
byte.
For example:
If the ESB bit is required to be set true only when an execution or device dependent error
occurs, then Nrf should be set to 24. The binary decode is 00011000 so bit 3 or bit 4, when
true, will set the ESB bit true; but when bits 0 - 2, or 5 - 7 are true, the ESB bit will remain
false.
5-38. Reading the Standard Event Enable Register
The common query: *ESE? reads the binary number in the ESE register. The response is a
decimal number, which is the sum of the binary-weighted values in the register.
5-39. The Error Queue
As errors in the instrument are detected, they are placed in a “first in, first out” queue, called
the Error Queue. This queue conforms to the format described in the SCPI Command
Reference (Volume 2) Chapter 19, paragraph 19.7, although only errors are detected. Three
kinds of errors are reported in the error queue: command errors, execution errors and
device-specific errors.
The queue is read destructively, as described in the SCPI Command Reference, using the
query command “SYSTem:ERRor?”. This command will return a code number and error
message. The query SYSTem:ERRor? can be used to read errors in the queue until it is
empty, (when the message “0, No Error” will be returned).
5-40. Instrument Status Reporting - SCPI Elements
5-41. General
In addition to IEEE 488.2 status reporting the instrument implements the Operation and
Questionable Status registers with associated Condition, Event and Enable commands.
The extra status deals with current operation of the instrument and the quality of operations.
The structure of these two registers is detailed in the diagram at the beginning of “IEEE-488
and SCPI Standard Defined Features” section, together with the nature of the reported
events. Access to the registers is detailed in the STATus subsystem of the “SCPI
Commands and Syntax” section.
5-42. SCPI Status Registers
The SCPI states are divided into two groups, reporting from the Operation or Questionable
Status event register. Each Status register has its own Enable register, which can be used as
a mask to enable bits in the event register itself, in a similar way to that set by the *ESE
command for the Standard Event status Register (ESR).
Each Status Register is associated with its own third Condition register, in which the bits are
not “sticky”, but are set and reset as the internal conditions change.
Each Enable Register can be commanded to set its mask to enable selected bits in the
corresponding Event Register. All registers (Event, Enable and Condition) can be
interrogated by appropriate Queries to divulge their bits' states.
To Next Page
Loading...
