INVT SV-DA200 Series User Manual

SV-DA200 series AC servo drive Communication
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High bit of start address
03H
Low bit of start address
F2H
High bit of data number
00H
Low bit of data number
02H
Low bit of CRC CHK
E0H
High bit of CRC CHK
7FH
END
T1-T2-T3-T4 (transmission time of 3.5 bytes)
8.2.5 Error checkout of the communication frame
The error checkout of the frame can be divided into two parts: the bit checkout of the byte and the
whole data checkout of the frame (CRC check or LRC check).
8.2.5.1 Bit checkout of the byte
The user can select different bit checkouts or non-checkout, which impacts the check bit setting of
each byte.
The definition of even checkout: add an even check bit before the data transmission to illustrate the
number of “1” in the data transmission is odd number or even number. When it is even, the check byte
is “0”, otherwise, the check byte is”1”. This method is used to stabilize the parity of the data.
The definition of odd checkout: add an odd check bit before the data transmission to illustrate the
number of “1” in the data transmission is odd number or even number. When it is odd, the check byte
is “0”, otherwise, the check byte is”1”. This method is used to stabilize the parity of the data.
For example, when transmitting “11001110”, there are five “1” in the data. If the even checkout is
applied, the even check bit is “1”; if the odd checkout is applied; the odd check bit is “0”. The even and
odd check bit is calculated on the check bit position of the frame. And the receiving devices also carry
out even and odd checkout. If the parity of the receiving data is different from the setting value, there
is an error in the communication.
8.2.5.2 CRC check
The checkout uses RTU frame format. The frame includes the frame error detection field which is
based on the CRC calculation method. The CRC field is two bytes, including 16-bit binary values. It is
added into the frame after calculated by transmitting device. The receiving device recalculates the
CRC of the received frame and compares them with the value in the received CRC field. If the two
CRC values are different, there is an error in the communication.
During CRC, 0*FFFF will be stored. And then, deal with the continuous 6-above bytes in the frame
and the value in the register. Only the 8Bit data in every character is effective to CRC, while the start
bit, the tailed and the odd and even check bit is ineffective.
During the generating CRC, each 8-bit is XOR with the register content, the result shifts toward the
min. effective bit while the max. effective bit is filled with 0. LSB is extracted for detection. If LSB is 1,
the register is XOR with the preset value independently, if LSB is 0, no action. The whole process will
be repeated 8 times. After the last bit (8
th
bit) completes, the next 8-bit byte will be XOR with the

INVT SV-DA200 Series Specifications

General

Brand	INVT
Model	SV-DA200 Series
Category	Servo Drives
Language	English