Figure 25: MX240 PIC Interface Port Mapping
g000119
1
2
1
0
0
0
1 0
1 2
Channelized
STM-4/OC-12 SFP
1/0/2
1/0/0
1/0/1
1/0/3
The show chassis hardware command output displays a Channelized OC12/STM4
Enhanced IQ (IQE) PIC (4x CHOC12 IQE SONET) installed in MX FPC Type 2.
user@host> show chassis hardware
...
FPC 1 REV 01 710-024386 JW9571 MX FPC Type 2
CPU REV 03 710-022351 KE2986 DPC PMB
PIC 0 REV 00 750-022630 DS1284 4x CHOC12 IQE SONET
Xcvr 0 REV 01 740-011782 PB821SG SFP-SX
Xcvr 1 REV 01 740-011782 PB829Q6 SFP-SX
Xcvr 2 REV 01 740-011613 P9F15NQ SFP-SX
Xcvr 3 REV 01 740-011782 P7N036X SFP-SX...
The show interfaces terse command output displays the channelized SONET OC12
interfaces (coc12), that correspond to the four ports located on the PIC.
user@host> show interfaces terse coc12*
Interface Admin Link Proto Local Remote
coc12-1/0/0 up up
coc12-1/0/1 up up
coc12-1/0/2 up up
coc12-1/0/3 up up
Related
Documentation
MX240 Router Hardware and CLI Terminology Mapping on page 10•
MX240 PIC LEDs
Each PIC has LEDs located on the faceplate. For more information about LEDs on the
PIC faceplate, see the “LEDs” section for each PIC in the MX Series Interface Module
Reference.
61Copyright © 2017, Juniper Networks, Inc.
Chapter 6: Line Card Components and Descriptions