PCWS 2015 Setup Guide - 2nd Edition 2-21
PCWS 2015 BIOS
Advanced
> SB PCI Express Config
Pressing Enter provides access to the PCI Express configuration menu,
shown in the Figure below.
Figure 2-10: South Bridge PCI Express Port Configuration Menu
PCI Express Root Port Clock Gating [Disabled]
Enables or Disables dynamic clock gating of the shared resource link
clock domain.
PCI Express Controller DMI Setting [L0S And L1]
Configures the DMI settings of the PCI Express controller.
> PCI Express Root Port 1 Config
PCI Express Root Port 1 is assigned to CN15, a PCIe x1 connector.
This connector is currently not assigned.
CAUTION
Disabling system board USB ports can cause USB
peripherals such as the touchscreen controller to fail or
cause USB based options such as WiFi or the fingerprint
reader to fail.
BIOS Version O13101g or later prevents USB0 (USB
Hard Disk) and USB7 (touchscreen interface) from being
disabled at the BIOS level.