Motorola MPC823e - Page 37

LIST OF ILLUSTRATIONS (Continued)
Figure Page
Number Title Number
MOTOROLA MPC823e REFERENCE MANUAL xxxv
15-20. User-Programmable Machine Block Diagram ..............................................15-40
15-21. RAM Array Indexing .....................................................................................15-41
15-22. Memory Periodic Timer Request Block Diagram .........................................15-42
15-23. UPM Clock Scheme One (Division Factor = 1) ............................................15-44
15-24. UPM Clock Scheme Two (Division Factor = 2) ............................................15-45
15-25. UPM Signals Timing Example One (Division Factor = 1, EBDF = 00) .........15-46
15-26. UPM Signals Timing Example Two (Division Factor = 2, EBDF = 01) .........15-47
15-27. RAM Array and Signal Generation ...............................................................15-48
15-28. CSx
Signal Selection ....................................................................................15-55
15-29. BSx
Signal Selection ....................................................................................15-56
15-30. Early GPL5
Control ......................................................................................15-58
15-31. Address Multiplex Timing .............................................................................15-60
15-32. UPM Read Access Data Sampling ..............................................................15-64
15-33. Wait Mechanism Timing For Internal and External Synchronous
Masters ........................................................................................................15-65
15-34. Wait Mechanism Timing For An External Asynchronous Master .................15-66
15-35. Synchronous External Master Access .........................................................15-69
15-36. Asynchronous External Master Access ........................................................15-70
15-37. Synchronous External Master Interconnect Example ..................................15-72
15-38. Synchronous External Master–Burst Read Access To Page Mode
DRAM ...........................................................................................................15-73
15-39. Asynchronous External Master Interconnect Example ................................15-74
15-40. Asynchronous External Master Timing Example .........................................15-75
15-41. Page Mode DRAM Interface Connection .....................................................15-76
15-42. Single Beat Read Access To Page Mode DRAM ........................................15-78
15-43. Single Beat Write Access To Page Mode DRAM .........................................15-79
15-44. Burst Read Access To Page Mode DRAM (No LOOP) ...............................15-80
15-45. Burst Read Access To Page Mode DRAM (LOOP) .....................................15-81
15-46. Burst Write Access To Page Mode DRAM (No LOOP) ................................15-82
15-47. Burst Write Access To Page Mode DRAM (Loop) .......................................15-83
15-48. Refresh Cycle (CAS Before RAS) To Page Mode DRAM ............................15-84
15-49. Exception Cycle ...........................................................................................15-85
15-50. Optimized DRAM Burst Read Access ..........................................................15-87
15-51. EDO DRAM Interface Connection ................................................................15-88
15-52. EDO DRAM Single Beat Read Access ........................................................15-90
15-53. EDO DRAM Single Beat Write Access ........................................................15-91
15-54. EDO DRAM Burst Read Access ..................................................................15-92
15-55. EDO DRAM Burst Write Access ..................................................................15-93
15-56. EDO DRAM Refresh Cycle (CAS Before RAS) ...........................................15-94
15-57. EDO DRAM Exception Cycle .......................................................................15-95
15-58. Blank Worksheet for a UPM .........................................................................15-96