Communication Processor Module
MOTOROLA
MPC823e REFERENCE MANUAL
16-165
SCCs
COMMUNICATION
16
PROCESSOR MODULE
16.9.1 Features
The following is a list of the serial communication controllers’ main features:
• Implements the HDLC, HDLC bus, asynchronous HDLC, synchronous start/stop,
asynchronous start/stop, AppleTalk, Transparent, and Ethernet protocols
• Supports full 10Mbps Ethernet/IEEE 802.3
• A single HDLC or transparent channel can be supported at 8Mbps (full duplex)
• Maximum clocking rates of 12.5MHz at 25MHz
• DPLL circuitry for clock recovery with NRZ, NRZI, FM0, FM1, Manchester, and
Differential Manchester (also known as Differential Bi-phase-L)
• Clocks can be derived from a baud rate generator, an external pin, or DPLL; data clock
can be as high as 3.125MHz with a 25MHz clock
• Supports automatic control of the RTSx
, CTSx, and CDx modem signals
• Multibuffer data structure for receive and transmit (up to 512 buffer descriptors can be
partitioned in any way)
• Deep FIFOs
• Transmit-on-demand feature decreases time-to-frame transmission
• Low FIFO latency option for transmit and receive in character-oriented and totally
transparent protocols
• Frame preamble options
• Full-duplex operation
• Fully transparent option for receiver/transmitter while another protocol executes on the
transmitter/receiver
• Echo and local loopback modes for testing
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