© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 25
Philips Semiconductors
UM10161
Volume 1 Chapter 3: System control block
[1] Reset value reflects the data stored in used bits only. It does not include reserved bits content.
Table 15: PLL registers
Generic
name
Description Access Reset
value
[1]
Address
PLLCON PLL Control Register. Holding register for
updating PLL control bits. Values written to this
register do not take effect until a valid PLL feed
sequence has taken place.
R/W 0 0xE01F C080
PLLCFG PLL Configuration Register. Holding register
for updating PLL configuration values. Values
written to this register do not take effect until a
valid PLL feed sequence has taken place.
R/W 0 0xE01F C084
PLLSTAT PLL Status Register. Read-back register for
PLL control and configuration information. If
PLLCON or PLLCFG have been written to, but
a PLL feed sequence has not yet occurred,
they will not reflect the current PLL state.
Reading this register provides the actual
values controlling the PLL, as well as the
status of the PLL.
RO 0 0xE01F C088
PLLFEED PLL Feed Register. This register enables
loading of the PLL control and configuration
information from the PLLCON and PLLCFG
registers into the shadow registers that
actually affect PLL operation.
WO NA 0xE01F C08C
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