R&S ZNA67 - Page 876

Remote control
R&S
®
ZNA
876User Manual 1178.6462.02 ─ 20
6.5.4.1 Service request
The R&S ZNA can send a service request (SRQ) to the controller. Usually this service
request causes an interrupt, to which the control program can react appropriately.
Initiating an SRQ
As shown in section Overview of status registers, an SRQ is initiated if one or several
of bits 2, 3, 4, 5 or 7 of the status byte are set and enabled in the SRE. Each of these
bits summarizes the information of a further register, the error queue or the output buf-
fer.
The ENABle parts of the status registers can be set such that arbitrary bits in an arbi-
trary status register initiate an SRQ. To use the possibilities of the service request
effectively, all bits in the enable registers SRE and ESE must be set to "1".
Example: Use *OPC to generate an SRQ
1. Set bit 0 in the ESE (Operation Complete).
2. Set bit 5 in the SRE (ESB).
3. Insert *OPC in the command sequence (e.g. at the end of a sweep).
When all commands preceding *OPC have been completed, the instrument generates
an SRQ.
Example: Generate an SRQ when a limit is exceeded
1. Set bit 3 in the SRE (summary bit of the STATus:QUEStionable register, set
after STATus:PRESet)
2. Set bit 10 in the STATus:QUEStionable:ENABle register (summary bit of the
STATus:QUEStionable:LIMit1 register)
3. Set bit 1 in the STATus:QUEStionable:LIMit1:ENABle register
The R&S ZNA generates an SRQ when the event associated with bit 1 of the
STATus:QUEStionable:LIMit1:ENABle register occurs, i.e. when any point on
the first trace fails the limit check.
Example: Find out which event caused an SRQ
The procedure to find out which event caused an SRQ is analogous the procedure to
generate an SRQ:
1. STB? (query the contents of the status byte in decimal form)
If bit 3 (QUEStionable summary bit) is set, then:
2. STAT:QUES:EVENT? (query STATus:QUEStionable register)
If bit 10 (QUEStionable:LIMit1 summary bit) is set, then:
Status reporting system