Tandy 1400LT - Write Gate and Write Data Timing

Write Gate
A “Low” level on this line enables writing.
When the READ DATA or STEP lines are activated, the signal on this line must be “High”. The change of
DRIVE SELECT, start
of reading, and STEP must be delayed 1.5 ms after WRITE GATE becomes “High”,
because the erase head is operated for this time. When the above is not observed, it may cause a data error.
WRITE GATE
0.5ms may-
I_
-
ERASE CURRENT
.
Figure C-7 illustrates the timing for WRITE GATE and WRITE DATA.
I
1.2 rns max
- -
I
j- --
DATA
8ys rnax-
WRITE DATA
8ys rnax
-
DATA
VALID
STEP
READ DATA
DATA VALID
1/11 l111Il
1111 111111 1
1.5 rns min
-
Figure C-7. Write Gate and Write Data Timing
Side
1 Select
A “Low” level on this line selects side 1 and “High” selects side 0.
When the WRITE GATE is “Low”, the change of a side is invalid.
Output Signals
Output signals are as follows:
(1) INDEX
(2) TRACK 00
(3) WRITE PROTECT
(4) READ DATA
(5) READY
c-10