Tandy 1400LT - Clock-Gen.2; Clock-Gen.3

Figure 4-4 Clock-Gen.2 shows IC2 and peripheral circuitry.
Figure
4-5 Clock-Gen.3 shows internal logic block diagram of IC2.
DMACLK
HLA
CHCNG
RWT
CPUIOREADY
411CTL1 "
14.318MHz
OSCILLATOR
0
* *
SELECTOR
-. f 2 I
-,
Figure 4-4. Clock-Gen.2
I
14.318
YHz
RDY
-c
CHCNG
READY
D
0
RESIN CLK
Q' RESET
D
C
osc
CLK
Figure 4-5. Clock-Gen.3
4-5