Tandy 1400LT - Page 234

INTERFACE TIMING
Figure C-1 1 shows the timing relationship for Host/Drive interface signals.
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I
MOTOR ON I
I
POWER f ON
I
I -
I
I
I
I
I
DR I VE
SELECT I
Irns mox
TRACK 001 I1 I
-XI, 10ms
VALID I
I
READY I
I
I
I
I
STEP I
I
I 1
- I scc rnox ~
--~ X2(430ms rn’n)
1.5 rns rnin
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I 21 ms rnin ---r ?-
I
21ms min
WRITE GATE
I
I
I
I
I -. - 1.5ms min
I -1
-
WRITE DATA
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I
READ DATA
*
VALID
*1 All input/output signals are off for 100 ms from Power On because of internal protect function.
*2 (
)
is our recommended value to keep power consumption small.
Figure C-1 1. Timing Relationship for HostIDrive Interface Signal
C-13