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Vigor VS Series - Page 288

Vigor VS Series
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282
D PW S U M
D
S
n
FNC
140
1
2
M
3
n
X Y M S
D.b R.b
KnX KnY
KnM KnS
T C
D,R
V,Z
UnG
K,H
E
" $"
S
D
WSUM D10 D100 K5
X0
S
D
n
S : the head ID of source devices to be added up
D : the destination device to store the amount
n : the number of consecutive devices to be accumulated
When the X0 = “ON”, this instruction accumulates the contents of D10~D14 (5 16-bit devices), then stores the
amount to the (D101, D100).
This 16-bit instruction adds up the consecutive 16-bit word devices which are started from , then store the
result to the 32-bit double word device .
S
D
n
The result device for this 16-bit instruction is a 32-bit device, the positive or negative sign is located at its
the Most Significant Bit (MSB = 0 = positive; MSB = 1 = negative).
DWSUM D0 D100 K4
X0
S
D
n
When the X0 = “ON”, this instruction accumulates the contents of (D1, D0) ~ (D7, D6) (4 32-bit devices), then
stores the amount to the (D103, D102, D101, D100).
This 32-bit instruction adds up the consecutive 32-bit word devices which are started from , then store the
result to the 64-bit double word device .
S
D
n
The result device for this 32-bit instruction is a 64-bit device, the positive or negative sign is located at its
the Most Significant Bit (MSB = 0 = positive; MSB = 1 = negative).
655
(D101, D100)
X0=ON
D10
D11
D12
D13
D14
101
55
234
186
79
S
D
5
n
1000000
(D103, D102, D101, D100)
64 bits
X0=ON
100000
200000
300000
400000
D
(D1, D0)
(D3, D2)
(D5, D4)
(D7, D6)
S
4
n
n
>0
Operand
Devices
Sum of Word Data
For a 16-bit instruction, S occupies n components, D occupies 2 components
For a 32-bit instruction, S occupies (2×n) components, D occupies 4 components
D
D

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