320
D PB K C M P =
S1
S2
n
D
1
2
M
3
○
FNC
194
X Y M S
D.b R.b
KnX KnY
KnM KnS
T C
D,R
V,Z
UnG
K,H
E
" $"
S1
D
S2
n
D PB K C M P >
S1
S2
n
D
1
2
M
3
○
FNC
195
1
2
M
3
○
FNC
196
D PB K C M P <
S1
S2
n
D
D PB K C M P < >
S1
S2
n
D
1
2
M
3
○
FNC
197
D PB K C M P < =
S1
S2
n
D
1
2
M
3
○
FNC
198
D PB K C M P > =
S1
S2
n
D
1
2
M
3
○
FNC
199
S1 : the comparison value or the head ID of the
comparison data block
S2 : the head ID of another comparison data block
D : the head ID of the comparison result block
n : the length of the data block to be compared
X0
D
S1 S 2
BKCMP=P D0 D10 M0 K5
n
When X0 = “OFF” → “ON”, each component in the first block (D0~D4) will compare with the relevant component
of the second block (D10~D14), and store the compare result to the destination block (M0~M4) one by one.
D0
D1
D2
D3
D4
K100
K200
K234
K400
K–1
S1
D10
D11
D12
D13
D14
K10
K200
K–10
K400
K8
n n
S2
M0
M1
M2
M3
M4
0(OFF)
1(ON)
n
D
"＝"
CMP
0(OFF)
1(ON)
0(OFF)
The FNC194~FNC199 are designed for to execute the =, >, <, <>, ≤ and ≥ comparisons respectively.
The can directly use a constant number.
When all the comparative results in the block are “ON”, the M9090 = “ON”.
S1
D
X0
D
S1 S 2
n
(D5, D4)
(D1, D0)
S1
n
(D3, D2)
(D15, D14)
n
(D13, D12)
(D11, D10)
S2
n
DBKCMP<> D0 D10 M0 D100
"<>"
CMP
M0
M1
M2
D
■
M9090
K123456
K200000
K5
K–2
K123456
K10
0(OFF)
1(ON)
1(ON)
Operand
Devices
■
The related special devices are summarized below: ( : Means read only.)
Description
Relay ID No.
All bits “ON” ag at the result of a block data comparison BKCMP (FNC194~FNC199) instruction.
Block Data Compare (S1) = (S2)
Block Data Compare (S1) > (S2)
Block Data Compare (S1) < (S2)
Block Data Compare (S1) ≠ (S2)
Block Data Compare (S1) ≤ (S2)
Block Data Compare (S1) ≥ (S2)
For a 32-bit instruction, the components at the , and are all organized by the 32-bit format.
S1 S2
n
Assume the content value of the 32-bit instruction’s at (D101, D100) is equal to K3, the treatment is as the
following:
For a 16-bit instruction, S1, S2 and D occupies n components individually (except that S1 is using K or H)
For a 32-bit instruction, S1 and S2 occupies (2×n) components individually (except that S1 is using K or H),
also D occupies n components
n
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