Allwinner A20 - DMA Register List

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 153 / 812
1.12.2. DMA Register List
Module Name
Base Address
DMA
0x01C02000
Register Name
Offset
Description
DMA_IRQ_EN_REG
0x0
DMA IRQ Enable
DMA_IRQ_PEND_STA_REG
0x4
DMA IRQ Pending Status
NDMA_AUTO_GAT_REG
0x8
NDMA Auto Gating
NDMA_CTRL_REG
0x100+N*0x20
Normal DMA Configuration
(N=0,1,2,3,4,5,6,7)
NDMA_SRC_ADDR_REG
0x100+N*0x20+0x4
Normal DMA Source Address
(N=0,1,2,3,4,5,6,7)
NDMA_DEST_ADDR_REG
0x100+N*0x20+0x8
Normal DMA Destination
Address
(N=0,1,2,3,4,5,6,7)
NDMA_BC_REG
0x100+N*0x20+0xC
Normal DMA Byte Counter
(N=0,1,2,3,4,5,6,7)
DDMA_CFG_REG
0x300+N*0x20
Dedicated DMA Configuration
(N=0,1,2,3,4,5,6,7)
DDMA_SRC_START_ADDR_REG
0x300+N*0x20+0x4
Dedicated DMA Source Start
Address
(N=0,1,2,3,4,5,6,7)
DDMA_DEST_START_ADDR_RE
G
0x300+N*0x20+0x8
Dedicated DMA Destination
Start Address
(N=0,1,2,3,4,5,6,7)
DDMA_BC_REG
0x300+N*0x20+0xC
Dedicated DMA Byte Counter
(N=0,1,2,3,4,5,6,7)
DDMA_PARA_REG
0x300+N*0x20+0x18
Dedicated DMA Parameter
(N=0,1,2,3,4,5,6,7)