Allwinner A20 - DEFE Block Diagram; DEFE Register List

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 478 / 812
5.3.2. DEFE Block Diagram
DEBEx
Ahb bus
DMA
C
Deinterlace
scaler
input
control
VPP
output
select
DMA
C
Mem bus
Register
file
From
DEBE2lcd
Interface
From
DEBE
CSC
R(3D)
L
L
R(3D)
5.3.3. DEFE Register List
Module Name
Base Address
DEFE0
0x01E00000
DEFE1
0x01E20000
Register Name
Offset
Description
DEFE_EN_REG
0x0000
DEFE Module Enable Register
DEFE_FRM_CTRL_REG
0x0004
DEFE Frame Process Control Register
DEFE_BYPASS_REG
0x0008
DEFE CSC By-Pass Register
DEFE_AGTH_SEL_REG
0x000C
DEFE Algorithm Selection Register
DEFE_LINT_CTRL_REG
0x0010
DEFE Line Interrupt Control Register
DEFE_BUF_ADDR0_REG
0x0020
DEFE Input Channel 0 Buffer Address
Register
DEFE_BUF_ADDR1_REG
0x0024
DEFE Input Channel 1 Buffer Address
Register
DEFE_BUF_ADDR1_REG
0x0028
DEFE Input Channel 2 Buffer Address
Register