Allwinner A20 - Chapter 4 Image

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 353 / 812
Chapter 4 Image
This chapter introduces the image section of A20 processor, including:
 CSI0
 CSI1
 TVD
Here is the CMOS sensor and TV decoder with YUV data process diagram
：
CSI0
Camera0 / TV
decoder
Camera1 / TV
decoder
CSI1
BT601/BT656
BT601/BT656
Frame Buffer
(DRAM)
YUV
YUV
GPU Render
YUV
Video EncoderYUV
Display Engine
and TCON
Display
Terminal
HDMI Receiver
IC
MUX
HSYNC/DE
VSYNC
FIELD(EVENODD)
PCLK
{PR[7:0],PB[7:0],Y[7:0]}