Allwinner A20 - Port Configuration Table

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 232 / 812
1.19.2. Port Configuration Table
Port
A(PA)
Multiplex Function Select
PA0
ERXD3
SPI1_CS0
UART2_RTS
GRXD3
PA1
ERXD2
SPI1_CLK
UART2_CTS
GRXD2
PA2
ERXD1
SPI1_MOSI
UART2_TX
GRXD1
PA3
ERXD0
SPI1_MISO
UART2_RX
GRXD0
PA4
ETXD3
SPI1_CS1
GTXD3
PA5
ETXD2
SPI3_CS0
GTXD2
PA6
ETXD1
SPI3_CLK
GTXD1
PA7
ETXD0
SPI3_MOSI
GTXD0
PA8
ERXCK
SPI3_MISO
GRXCK
PA9
ERXERR
SPI3_CS1
GNULL/ERXERR
I2S1_MCLK
PA10
ERXDV
UART1_TX
GRXCTL/RXDV
PA11
EMDC
UART1_RX
GMDC
PA12
EMDIO
UART6_TX
UART1_RTS
GMDIO
PA13
ETXEN
UART6_RX
UART1_CTS
GTXCTL/ETXEN
PA14
ETXCK
UART7_TX
UART1_DTR
GNULL/ETXCK
I2S1_BCLK
PA15
ECRS
UART7_RX
UART1_DSR
GTXCK/ECRS
I2S1_LRCK
PA16
ECOL
CAN_TX
UART1_DCD
GCLKIN/ECOL
I2S1_DO
PA17
ETXERR
CAN_RX
UART1_RING
GNULL/ETXERR
I2S1_DI
Port A(PA) Multiplex Function Select Table
Port B(PB)
Multiplex Function Select
PB0
TWI0_SCK
PB1
TWI0_SDA
PB2
PWM0
PB3
IR0_TX
SPDIF_MCLK
STANBYWFI
PB4
IR0_RX
PB5
I2S_MCLK
AC97_MCLK