Allwinner A20 - 2.2. NAND Flash

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2.2. NAND Flash

2.2.1. Overview

The NFC is the NAND Flash Controller which supports all NAND/MLC flash memory available in the

market now. New type flash can be supported by software reconfiguration. The NFC can support 8

NAND flash with 1.8/3.3 V voltage supply. There are 8 separate chip select lines (CE#) for

connecting up to 8 flash chips with2 R/B signals.

The On-the-fly error correction code (ECC) is built-in NFC for enhancing reliability. BCH is

implemented and it can detect and correct up to 64 bits error per 512 or 1024 bytes data. The on chip

ECC and parity checking circuitry of NFC frees CPU for other tasks. The ECC function can be

disabled by software.

The data can be transferred by DMA or by CPU memory-mapped IO method. The NFC provides

automatic timing control for reading or writing external Flash. The NFC maintains the proper relativity

for CLE, CE# and ALE control signal lines. Three kind of modes are supported for serial read access.

The conventional serial access is mode 0 and mode 1 is for EDO type and mode 2 for extension EDO

type. NFC can monitor the status of R/B# signal line.

Block management and wear leveling management are implemented in software.

It features:

 Comply to ONFI 2.3 and Toggle 1.0

 Support 64-bit ECC per 512 bytes or 1024 bytes

 Support 8bits data bus width

 Support 1K/2K/4K/8K/16K page size

 Support up to 8 CE and 2 RB

 Support system boot from NAND flash

 Support SLC/MLC NAND and EF-NAND

 Support SDR/DDR NAND interface