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Allwinner A20 - Transport Stream Block Diagram; Transport Stream Controller Register List

Allwinner A20
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A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 747 / 812
6.13.2. Transport Stream Block Diagram
TSC
TS IN0
TS IN1
TS INn
TS OUT0
TS OUT1
TS OUTn
SSI2SPI
SPI
MUX
SSI2SPI
SSI2SPI
TSG
TSF
TSF
TSF
TSF
SPI
SPI
SPI
SPI
TSD
TSD
TSD
SPI
SPI
SPI2SSI
SPI2SSI
SPI2SSI
6.13.3. Transport Stream Controller Register List
Module Name
Base Address
TSC
0x01c04000
TSG OFFSET
0x00000040
TSF0 OFFSET
0x00000080
TSF1 OFFSET
0x00000100
TSD OFFSET
0x00000180
Register Name
Offset
Description
TSC_CTLR
TSC + 0x00
TSC Control Register
TSC_STAR
TSC + 0x04
TSC Status Register
TSC_PCTLR
TSC + 0x10
TSC Port Control Register
TSC_PPARR
TSC + 0x14
TSC Port Parameter Register
TSC_TSFMUXR
TSC + 0x20
TSC TSF Input Multiplex Control Register
TSC_OUTMUXR
TSC + 0x28
TSC Port Output Multiplex Control Register

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