Allwinner A20 - SPI Register List

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 591 / 812
Phase 1
SPI_SCLK (Mode 1)
SPI_SCLK (Mode 3)
SPI_MOSI
SPI_MISO
SPI_SS
Sample MOSI/ MISO pin
SPI Phase 1 Timing Diagram
6.3.3. SPI Register List
Module Name
Base Address
SPI0
0x01C05000
SPI1
0x01C06000
SPI2
0x01C17000
SPI3
0x01C1F000
Register Name
Offset
Description
SPI_RXDATA
0x00
SPI RX Data register
SPI_TXDATA
0x04
SPI TX Data register
SPI_CTL
0x08
SPI Control register
SPI_INTCTL
0x0C
SPI Interrupt Control register
SPI_ST
0x10
SPI Status register
SPI_DMACTL
0x14
SPI DMA Control register
SPI_WAIT
0x18
SPI Wait Clock Counter register
SPI_CCTL
0x1C
SPI Clock Rate Control register
SPI_BC
0x20
SPI Burst Counter register