Allwinner A20 - UART Register Description

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 609 / 812
Register Name
Offset
Description
UART_RBR
0x00
UART Receive Buffer Register
UART_THR
0x00
UART Transmit Holding Register
UART_DLL
0x00
UART Divisor Latch Low Register
UART_DLH
0x04
UART Divisor Latch High Register
UART_IER
0x04
UART Interrupt Enable Register
UART_IIR
0x08
UART Interrupt Identity Register
UART_FCR
0x08
UART FIFO Control Register
UART_LCR
0x0C
UART Line Control Register
UART_MCR
0x10
UART Modem Control Register
UART_LSR
0x14
UART Line Status Register
UART_MSR
0x18
UART Modem Status Register
UART_SCH
0x1C
UART Scratch Register
UART_USR
0x7C
UART Status Register
UART_TFL
0x80
UART Transmit FIFO Level
UART_RFL
0x84
UART_RFL
UART_HALT
0xA4
UART Halt TX Register
6.4.4. UART Register Description
6.4.4.1. UART RECEIVER BUFFER REGISTER
Offset: 0x00
Register Name: UART_RBR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:8
/
/
/
7:0
R
0
RBR
Receiver Buffer Register
Data byte received on the serial input port (sin) in UART mode,