Allwinner A20 - CAN System Block Diagram; CAN Bit Time Configuration

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 786 / 812
6.16.2. CAN System Block Diagram
APB Interface
Transmit buffer
Receive FIFO
Acceptance
filter
Bit processer
Bit machine
Receive
machine
Bit time logic
TX
RX
CAN transceiver
Can bus
6.16.3. CAN Bit Time Configuration
TSEG1 TSEG2
t
TSEG1
t
TSEG2
t
SYNC_SEG
NBT, t
BIT
CAN bit timing segment
Sample points
SYNC_SEG
BRPSJWTSEG1TSEG2
S
A
M
6bit2bit431
NBT x BPR = f
base
/ f
canbus
, f
base =
f
osc
/ 2 = 1 / (2 x t
clk
), (NBT = 8~25 recommended)
TQ = 2 x t
clk
x (32 x BRP.5 + 16 x BRP.4 + 8 x BRP.3 + 4 x BRP.2 + 2 x BRP.1 + BRP.0 + 1)
t
clk
= 1/f
osc
t
syncseg
=1 x TQ
t
tseg1
=TQ x (8 x TSEG1.3 + 4 x TSEG1.2 + 2 x TSEG1.1 + TSEG1.0 + 1)
t
tseg2
=TQ x (4 x TSEG2.2 + 2 x TSEG2.1 + TSEG2.0 + 1)