Allwinner A20 - Typical Application Circuit; TP Clock Tree; A;D Conversion Time

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1.15.2. Typical Application Circuit

Y-

X+

Y+

X-

1.15.3. TP Clock Tree

HOSC24M

AUDIO PLL

CLK_IN

PRESCALER

00:/2

01:/3

10:/6

11:/1

1.15.4. A/D Conversion Time

When the clock source is 24MHz and the prescaler value is 6, total 12-bit conversion time is as

following:

CLK_IN = 24MHz/6 = 4MHz

Conversion Time = 1/(4MHz/13Cycles) = 3.25us

FS_TIME (Frequency Scan Time) bases on TACQ and Touch Mode, they must meet the following

inequation: FS_TIME >= M*(TACQ + Conversion Time)

For example, if touch acquire time divider is 15, then TACQ = 4MHz /(16*(15+1)) = 64us. When TP

mode is dual and pressure measurement mode, then M=6, and the FS_TIME must be no less than

6*(64 + 3.25) us.