Allwinner A20 - 1.9. Timer

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1.9. Timer

1.9.1. Overview

A20 implements 6 timers.

Timer 0 and Timer 1 can take their inputs from internal RC oscillator, external 32768Hz crystal or

OSC24M.

They provide scheduler interrupt for OS to offer maximum accuracy and efficient management

for systems with long or short response time. A 24-bit programmable overflow counter is supported, which

can work in auto-reload mode or no-reload mode.

Timer 2 is used for OS to generate a periodic interrupt.

The watchdog is used to resume the controller operation when it is disturbed by malfunctions such as

noise and system errors. It features a down counter that allows a watchdog period of up to 16

seconds. It can generate a general reset or a interrupt request.

The real time clock is there for calendar usage It is built around a 30-bit counter and used to count

elapsed time in YY-MM-DD and HH-MM-SS. The unit can be operated by the backup battery while

the system is power off. It has a built-in leap year generator and a independent power pin(RTCVDD).

The alarm is used to generate an alarm signal at a specified time in power-off mode or normal

operation mode. In normal operation mode, both the alarm interrupt and the power management

wakeup are activated while in power-off mode, only the power management wakeup signal is

activated.