Allwinner A20 - TCON Register Description

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 410 / 812
Register Name
Offset
Description
TCON1_FILL_BEG2_REG
0x031C
TCON1 fill data begin register2
TCON1_FILL_END2_REG
0x0320
TCON1 fill data end register2
TCON1_FILL_DATA2_REG
0x0324
TCON1 fill data value register2
TCON1_GAMMA_TABLE_REG
0x0400
TCON1 gamma table register 0x400-0x7FF
5.1.4. TCON Register Description
5.1.4.1. TCON GLOBAL CONTROL REGISTER
Offset: 0x000
Register Name: TCON_GCTL_REG
Bit
Read/
Write
Default/
Hex
Description
31
R/W
0
TCON_En
0: disable
1: enable
When it’s disabled, the module will be reset to idle state.
30
R/W
0
TCON_Gamma_En
0: disable
1: enable
29:1
/
/
/
0
R/W
0
IO_Map_Sel
0: TCON0
1: TCON1
Note: this bit determined which IO_INV/IO_TRI are valid
5.1.4.2. TCON GLOBAL INTERRUPT REGISTER0
Offset: 0x004
Register Name: TCON_GINT0_REG
Bit
Read/
Write
Default/
Hex
Description