Allwinner A20 - PWM Register List; PWM Register Description

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 103 / 812
1.8.2. PWM Register List
Module Name
Base Address
PWM
0x01C20C00
Register Name
Offset
Description
PWM_CTRL_REG
0x200
PWM Control Register
PWM_CH0_PERIOD
0x204
PWM Channel 0 Period Register
PWM_CH1_PERIOD
0x208
PWM Channel 1 Period Register
1.8.3. PWM Register Description
1.8.3.1. PWM CONTROL REGISTER(DEFAULT: 0X00000000)
Offset: 0x200
Register Name: PWM_CTRL_REG
Bit
Read/
Write
Default/Hex
Description
31:30
/
/
/.
29
RO
0x0
PWM1_RDY.
PWM1 period register ready.
0: PWM1 period register is ready to write,
1: PWM1 period register is busy.
28
RO
0x0
PWM0_RDY.
PWM0 period register ready.
0: PWM0 period register is ready to write,
1: PWM0 period register is busy.
27:25
/
/
/
24
R/W
0x0
PWM1_BYPASS.
PWM CH1 bypass enable.
If the bit is set to 1, PWM1’s output is OSC24MHz.
0: disable