Allwinner A20 - UART Timing Diagram; UART Register List

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 608 / 812
6.4.2. UART Timing Diagram
Serial Data
S
Data bits 5-8
P
S 1,1.5,2
One Character
Bit TimeBit Time
One Character
TX/RX
UART Serial Data Format
S
Stop
3/16 Bit Time3/16 Bit Time
3/16 Bit Time3/16 Bit Time3/16 Bit Time3/16 Bit Time
Data Bits
Bit Time
Data Bits
Bit Time
SIN/SOUT
SIR_OUT
SIR_IN
Serial IrDA Data Format
6.4.3. UART Register List
There are 8 UART controllers. UART1 has full modem control signals, including RTS, CTS, DTR, DSR,
DCD and RING signal. UART2/3 has two data flow control singals, including RTS and CTS. Other UART
controller has only two data signals, including DIN and DOUT. All UART controllers can be configured as
Serial IrDA.
Module Name
Base Address
UART0
0x01C28000
UART1
0x01C28400
UART2
0x01C28800
UART3
0x01C28C00
UART4
0x01C29000
UART5
0x01C29400
UART6
0x01C29800
UART7
0x01C29C00