Allwinner A20 - IR Register Description

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 643 / 812
Register Name
Offset
Description
IR_RXCTL
0x10
IR Receiver Configure Register
IR_RXADR
0x14
IR Receiver Address Register
IR_RXCNT
0x18
IR Receiver Counter Register
IR_TXFIFO
0x1C
IR Transmitter FIFO Register
IR_RXFIFO
0x20
IR Receiver FIFO Register
IR_TXINT
0x24
IR Transmitter Interrupt Control Register
IR_TXSTA
0x28
IR Transmitter Status Register
IR_RXINT
0x2C
IR Receiver Interrupt Control Register
IR_RXSTA
0x30
IR Receiver Status Register
IR_CIR
0x34
CIR Configure Register
6.6.3. IR Register Description
6.6.3.1. IR CONTROL REGISTER
Offset: 0x00
Register Name: IR_CTL
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:9
/
/
/
8
R/W
0
CGPO
General Program Output (GPO) Control in CIR mode for TX
Pin
0: Low level
1: High level
7:6
/
/
/
5:4
R/W
0
MD
Irda Mode
00: 0.576 Mbit/s MIR mode
01: 1.152 Mbit/s MIR mode
10: 4.0 Mbit/s FIR mode
11: CIR mode for Remote control or wireless keyboard
3
R/W
0
/