Allwinner A20 - HDMI Register Description

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 439 / 812
Register Name
Offset
Description
DDC_FIFO_Status
0x514
DDC FIFO Status Register
DDC_FIFO_Access
0x518
DDC FIFO Access Register
DDC_Byte_Counter
0x51C
DDC Access Data Byte Number
DDC_Command
0x520
DDC Access Command Register
DDC_ExREG
0x524
DDC Extended Register
DDC_Clock
0x528
DDC Clock Register
DDC_DBG
0x540
DDC Slave Address Register
5.2.4. HDMI Register Description
5.2.4.1. HDMI VERSION ID
Offset: 0x000
Register name: Version_ID
Bit
Read/
Write
Default/
Hex
Description
31:16
R
0x0001
VER_ID_H: Version number of the core
15:0
R
0x0003
VER_ID_L: Version number of the core
5.2.4.2. SYSTEM CONTROL REGISTER
Offset: 0x004
Register name: Ctrl
Bit
Read/
Write
Default/
Hex
Description
31
R/W
0
MODULE_EN
0:disable
1:enable
30
R/W
0
HDCP_EN:
0:disable
1:reserved
29:2
/
/
reserved